A comparative study between HLS and HDL on SoC for image processing applications
The increasing complexity in today’s systems and the limited market times demand new development tools for FPGA. Currently, in addition to traditional hardware description languages (HDLs), there are high level synthesis (HLS) tools that increase the abstraction level in system development. Despite...
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| Autores principales: | , , |
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| Formato: | Artículo |
| Lenguaje: | inglés |
| Publicado: |
2020
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| Materias: | |
| Acceso en línea: | https://dialnet.unirioja.es/servlet/oaiart?codigo=7750806 |
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