A VLSI Architecture for Output Probability Computations of HMM-based Recognition Systems
None
Guardado en:
| Autores principales: | , , , |
|---|---|
| Formato: | Capítulo de libro |
| Lenguaje: | inglés |
| Publicado: |
IntechOpen
2010
|
| Materias: | |
| Acceso en línea: | https://www.intechopen.com/chapters/9454 |
| Etiquetas: |
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
Ejemplares similares: A VLSI Architecture for Output Probability Computations of HMM-based Recognition Systems
- A VLSI Architecture for Output Probability and Likelihood Score Computations of HMM-Based Recognition Systems
- Double Layer Architectures for Automatic Speech Recognition Using HMM
- VLSI Architectures for WIMAX Channel Decoders
- High-Speed VLSI Architectures for Turbo Decoders
- VLSI Computational Architectures for the Arithmetic Cosine Transform
- Impedance Matching in VLSI Systems