Noise Analysis in Nanostructured Tunnel Field Devices
Tunnel Field Effect Transistors (TFETs) have appeared as an alternative candidate of “beyond CMOS” due to their advantages like very low leakage current and steep sub-threshold slope i.e. <60 mV/dec., etc. From past decades, researchers explored TFETs in terms of high ON current and steep subthre...
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| Main Authors: | , |
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| Format: | Book Chapter |
| Language: | English |
| Published: |
IntechOpen
2021
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| Subjects: | |
| Online Access: | https://www.intechopen.com/chapters/79186 |
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| Summary: | Tunnel Field Effect Transistors (TFETs) have appeared as an alternative candidate of “beyond CMOS” due to their advantages like very low leakage current and steep sub-threshold slope i.e. <60 mV/dec., etc. From past decades, researchers explored TFETs in terms of high ON current and steep subthreshold slope at low supply voltage i.e. < VDD = 0.5 V. The reliability issues of the device have profound impact on the circuit level design for practical perspectives. Noise is one of the important parameters in terms of reliability and very few research papers addressed this problem in comparison to other parameter study. Therefore, in this chapter, we discussed the impact of noise on Tunnel FET devices and circuits. The detail discussion has been done for the random telegraph noise, thermal noise, flicker noise, and shot noise for Si/Ge TFET and III-V TFETs. Recent research work for both low frequencies as well high frequency noise for different TFET device design has been discussed in details. |
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| ISBN: | 978-1-80355-084-8 |
| DOI: | 10.5772/intechopen.100633 |